Abstract

A proposal for a class AB switched current memory cell, suitable for ultra-low-voltage applications is presented. The proposal employs transistors with floating gates, allowing to build analog building blocks for ultra-low supply voltage operation also in CMOS processes with high threshold voltages. This paper presents the theoretical basis for the design of “floating-gate” switched current memory cells by giving a detailed description and analysis of the most important impacts degrading the performance of the cells. To support the theoretical assumptions circuits based on “floating-gate” switched current memory cells were designed using a CMOS process with threshold voltages V_{T0n} = |V_{T0p}| = 0.9\hbox{\,V} for the n- and p-channel devices. Both hand calculations and PSPICE simulations showed that the designed example switched current memory cell allowed a maximum signal range better than ±18 μA with a supply voltage down to 1 V, and relatively small device dimensions. In spite of the relatively large signal processing range, the class AB operation of the cell enabled a very low quiescent current consumption, 1 μA in this design, resulting in a very high current efficiency and effective power consumption, as well as good noise performance.

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