Ultra-Low Program Current and Multilevel Phase Change Memory for High-Density Storage Achieved by a Low-Current SET Pre-Operation

Abstract

We have fabricated a pillar structure phase change memory (PCM) with the prototypical phase change material Ge <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> Sb <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> Te <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> . Using a Low Current SET (LCS) pre-operation, the devices can operate with an ultralow RESET current density and have multilevel cell (MLC) capability, and these features both contribute to high storage density. Specifically, the RESET current density is only 4.84 MA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , which is lowest among all the CMOS compatible PCM devices, and this ultra-low RESET current density enables the possibility to link with a two-terminal selector for 3D cross-point application. Meanwhile LCS makes MLC operation of our PCM more stable with a low operating current. In summary, this LCS pre-operation can greatly increase the storage density both by enabling integration with selectors for 3D cross-point and by stabilizing MLC operation when maintaining the feature size of PCM devices.