Ultra-Low Power Fast Multi-Channel 10-Bit ADC ASIC for Readout of Particle Physics Detectors

Abstract

The design and measurement results of an ultra-low power multi-channel fast 10-bit Analog-to-Digital Converter (ADC) ASIC, developed for readout systems in future particle physics experiments, are discussed. An 8-channel prototype with a PLL-based data serialization and a fast data transmission was designed and fabricated in a 130 nm CMOS process. The ADC converts analog data with sampling rates from about 10 kS/s to 40 MS/s, with power consumption proportional to sampling rate. The resulting Figure of Merit (FOM), for sampling rates 5–40 MS/s, is 35–42 fJ/conv.-step, per ADC channel. Similar power contribution is spent for fast data serialization and the largest contribution goes to data transmission. A wide spectrum of static and dynamic measurements confirm very good performance of this multi-channel ADC with ENOB ${\sim } 9.2$ bits, an excellent channel uniformity, and negligible crosstalk. The ADC works asynchronously and so it is not limited to systems with uniform time sampling. The ADC is designed using dynamic circuitry which eliminates static power consumption (except leakage), as a consequence it is ready for applications requiring power cycling.