Ultra Low Power CORDIC Processor for Wireless Communication Algorithms

Abstract

We designed and implemented an ultra low power CORDIC processor which targets the implementation of advanced wireless communications algorithms based on Givens rotations and Householder reflections. We propose a modified CORDIC algorithm and architecture, and we elaborate on the low power architectural and algorithmic techniques for minimizing its power consumption. Our CORDIC implementation consumes, in rotate mode, on average 50 μW @ 10 MHz under 1 V supply voltage in a .25 μm technology.