Abstract
Using a patented defect avoidance technique, high yield production of high density SRAM devices (ULSI SRAMs) can be achieved one process generation ahead of the rest of the industry. Production wafer yields as high as 100% and long-term average yields above 80% are reported on Inova's monolithic, 1.2μ, 320 square mm, one megabit SRAM demonstrating a practical method of achieving wafer scale integration. A yield model is presented and used to determine the optimized architecture and redundancy scheme for Inova's four megabit SRAM and to predict yield as a function of defect density. Achievement of a working 8M-bit experimental device using a 1.2μ process is also reported.
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