Two-stage phase/frequency detecting CPPLL

Abstract

CPPLL(charge pump phase-locked loops), the input-output characteristic of PFD(phase/frequency detector) is studied. It shows that the outputs of PFD not only express the phase and frequency differences of inputs, but also vary slowly. Based on the study, the two-stage phase/frequency detecting is proposed and the CPPLL with this function is realized. The outputs of the one-stage PFD are delayed and then detected by the two-stage PFD. The outputs of the two-stage PFD activate a charge pump with large current to tune the control voltage of VCO(voltage control oscillator) coarsely. Meantime, the outputs of the one-stage PFD activate the other charge pump with small current to tune the control voltage finely. The results show that this structure reduces the locking time by 7.46%-8.76%.