Abstract
This article presents an idea, design and test results of a new time-to-digital converter (TDC) implemented in an FPGA device. The high resolution of 13 ps and measurement range of 3.4 ns are achieved based on a two-stage time interpolation (TI). In the first and second stages of the TI we have used the Vernier delay line and a single tapped delay line, respectively. This solution provides respectable metrological parameters without the need to use a clock signal, and significantly saves the logical resources of an integrated circuit (IC). The proposed method, generally based on two different variants of the discrete delay line, is easy to design and implement in digital ICs. For experimental verification, the TDC was implemented in a single programmable device from family Virtex-7 (Xilinx).
Highlights
High precision time-to-digital converters are crucial in various applications, such as precise laser range findings [1,2], TOF measurements of particles in high-energy physics [3,4,5], positron emission tomography in medicine [6,7], Raman spectroscopy to study the chemical composition of materials [8], and instruments for space exploration [9,10]
A wide measurement range is obtained by counting the periods of a reference clock, while a high resolution can be achieved by using a shorter delay line that provides time interpolation within a single clock period [13,14]
In this paper we propose the two-stage, clock-free to-digital converter (TDC) based on a new combination of two delay line variants, i.e., the Vernier delay line (VDL) [11,23] in the first interpolation stage and standard tapped delay line (TDL) in the second one
Summary
High precision time-to-digital converters are crucial in various applications, such as precise laser range findings [1,2], TOF (time of flight) measurements of particles in high-energy physics [3,4,5], positron emission tomography in medicine [6,7], Raman spectroscopy to study the chemical composition of materials [8], and instruments for space exploration [9,10]. Typically a two-stage time interpolation method proposed by Nutt is applied [12] In this method, a wide measurement range is obtained by counting the periods of a reference clock, while a high resolution can be achieved by using a shorter delay line that provides time interpolation within a single clock period [13,14]. In this paper we propose the two-stage, clock-free TDC based on a new combination of two delay line variants, i.e., the Vernier delay line (VDL) [11,23] in the first interpolation stage and standard tapped delay line (TDL) in the second one This combination of conversion methods makes it possible to obtain a relatively high resolution within a reasonable measuring range, and can be implemented in a versatile and available
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