Two-dimensional Materials: Growth, Characterization, and Simulation

Abstract

Since the discovery of graphene in 2004, there has been a great interest in two-dimensional (2D) materials from both the academic community and the semiconductor industry. In this work, we study various 2D materials and 2D heterostructures, aimed towards large-area device fabrication. Through detailed experimental work and extensive first-principle calculations, we determined the lowest energy structure for the interface of graphene formation on the C-face of SiC. The lowest energy structure contains > 1 monolayer of Si at the interface, forming an adatom-on-adlayer structure. Low-energy electron microscopy (LEEM) was employed to study properties of 2D heterostructures such as graphene–WSe2 and graphene–MoS2. Work function differences from the layers were extracted and band alignments were obtained, from which the nature of the contact at the interface was revealed. The electrical contact was found to be dependent on the constituent 2D layers of the heterostructures, as well as on the doping of the 2D layers. Finally, we consider simulation of devices made with 2D materials. We focus on interlayer tunneling field-effect transistors (TFETs) using 2D materials as the drain and source electrodes. By employing the first-principles density-functional-theory (DFT) wavefunctions, in the Bardeen tunneling formalism, we develop a “DFT-Bardeen” method that permits the computation of current-voltage characteristics in interlayer TFETs with reliable values for the magnitude of the currents. This method allows incorporation of differing materials into the source and drain electrodes, i.e. with different crystal structure, lattice constants, and/or band structure. Large variations in tunneling current were found, depending on the 2D materials being used. It is shown that the DFT-Bardeen method takes into account effects that are beyond simple lateral-momentum conservation, including the detailed symmetry and form of the wavefunctions. Predicted values for the tunneling current, including the subthreshold swing and the ON current, are compared with benchmark values for low-power digital applications.