Abstract

A two-way oxide rupture scheme in a transistor is proposed for area-efficient PUF implementation for low-cost IoT systems. Compared to a conventional one-way oxide rupture scheme, which requires a 4T unit cell structure, the proposed scheme allows a 2T unit cell structure, which enables up to 70% area reduction. A test chip is fabricated in 180 nm CMOS process to evaluate the effectiveness of the proposed scheme, confirming good randomness and uniqueness with small area overhead.

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