Two Phase CCD with Narrow-Channel Transfer Regions

Abstract

When the channel width of a FET becomes of the same order of magnitude as the depth of the gate depletion region, an increase of threshold voltage is observed. This narrow-channel effect has been applied successfully in creating an asymmetrical potential well under an electrode for two phase CCD operations. The basic performance of this new structure has been evaluated in a 242 element analog delay line with 60 µm channel width and 36 µm element length. Observed inefficiencies per transfer are in the low 10-4 for surface channel versions and in the low 10-5 for buried channel version.