Abstract
When the channel width of an FET becomes of the same order of magnitude as the depth of the gate depletion region, an increase of threshold voltage is observed. This narrow-channel effect has been applied successfully in creating an asymmetric potential well under an electrode for two phase CCD operations. The feasibility of this new structure has been confirmed in a 242 element analog delay line and the application is now extended to a 380H × 488V CCD Imager. In the constructed B/W CCD camera.
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