TVD‐PB logic circuit based on camouflaging circuit for IoT security

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Internet of Things (IoT) devices are vulnerable to many physical attacks, including reverse engineering and side-channel analysis because the sensitive information of circuits may be leaked through the physical characteristics of the device. A logic camouflaging circuit is proposed that uses a balanced power consumption and threshold voltage-defined technique to provide an antiphysical attack scheme to protect the hardware security for IoT devices. The proposed circuit uses a symmetric differential pull-down network in implementing the different logic functions through the threshold voltage reconfiguration circuit. As a result, the power consumption of the circuit attains balance and stability between two different logical operations. The proposed threshold voltage-defined power-balance (TVD-PB) design is fabricated using a 65-nm CMOS technology, and the core area occupies approximately 0.0044 mm2, composed of NAND, NOR, XOR, and INV components and multiplier gates of the proposed TVD-PB circuit. The entire chip passed the logic function tests. The measured results show that the average similarity of the TVD-PB universal gate is 99.68%. In addition, the current margin is higher than 55 μA and power consumption of 0.455 mW during each clock cycle at 1.2 V derives 0.1072% of the normalized energy deviation and 0.0453% of the normalized standard deviation. Compared with other state-of-the-art techniques, the power dependency against power attacks is improved effectively.