Tutorial on use of VHDL for description of digital systems

Abstract

A tutorial view of VHDL (VHSIC hardware description language), the IEEE standard for hardware description, is presented. The use of the language for bottom-up system design is emphasized. The tutorial describes simple components and uses these descriptions in a complete system design. Elaborating upon the language constructs, the system design example exhibits the use of VHDL as a design tool for the description of hardware. The application of VHDL in state machine design is expanded upon in the design of a controller. In finalizing the system design, the data unit and control unit are connected to form an eight bit serial multiplier. >