Tunneling towards efficiency: A survey of design and optimization strategies for tunnel FETs in ultra-low power applications

Abstract

The tunnel field-effect transistor (TFET) is a promising technology for low-power applications due to its high performance at reduced voltages through quantum tunneling. This article overviews TFETs and their potential to reduce power consumption in digital circuits, analog circuits, and energy harvesting applications. It highlights the challenges faced in TFET design, including gate electrostatics, source doping, and off-state limitations. The importance of design considerations and material selections is discussed, emphasizing their impact on TFET performance. Various fabrication techniques for TFETs are explored, highlighting their significance in achieving efficient and effective devices. The review concludes by stressing the need for further research and development to address existing challenges and unlock the full potential of TFETs in low-power electronic systems.