Tunnel Structured Stacked Capacitor Cell (TSSC) with High Reliability for 64 Mbit dRAMs and Formation of Oxide-Nitride-Oxide Film (ONO) on 3-dimensionally (3d) Storage Electrode

Abstract

We developed a new 3-dimensionally(3d) stacked capacitor structure, a tunnel structured stacked capacitor cell (TSSC), for 64Mbit dRAMs. The TSSC with 2 tunnels realized improved reliability the same as that of the conventional stacked capacitor (STC) and a capacitance of 29 fF with a capacitor height of 0.25 µm because of side-wall electrode formation. The equivalent thickness of SiO2 for the oxide nitride oxide (ONO) is 7.8 nm, and the cell area is 1.8 µm2. The uniformity of the ONO inside the tunnel of the TSSC was confirmed except for the corner of the tunnel, while the thickness of the ONO is slightly greater at the corner. At the corner, the top oxide film of the ONO is slightly thicker than that at the other areas, and accordingly, the shape of the plate electrode at the corner becomes round. These shape effects lead to no generation of the local field concentration at the corner inside the tunnel. They are applied to the other 3d stacked capacitors which have generally been proposed.