Abstract
The tunnel oxide degradation mechanism for the via hole RIE process has been investigated in flash memory LSIs. The degraded tunnel oxide generated ultra low leakage current (ULLC) was caused by trapping. The tunnel oxide thickness dependence of ULLC appearance has been observed to be between 10 and 16 nm. Plasma induced charging current generated by the trapping is considered to flow between metal-1 and the substrate through the control gate, interpoly insulating film, floating gate and tunnel oxide at the via hole etching end point, since the ULLC appearance has been observed to have no dependence upon overetching time and RF step-down power.
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