Tunnel Field-Effect Transistors for Future Low-Power Nano-Electronics

Abstract

Tunnel-FETs (TFETs) have the potential for a subthreshold swing below 60 mV/dec such that supply voltage scaling beyond the 1 V plateau of metal-oxide-semiconductor FETs (MOSFETs) is possible. The latter scaling is a necessary condition for a reduction of the power consumption per transistor. Silicon-based TFETs are the most attractive because they allow for a full re-use of the existing expertise in fabricating silicon MOSFETs. However, the large bandgap of silicon results in low on-currents. Therefore, the incorporation of heterostructures is proposed. In particular, a germanium-source silicon-channel n-TFET and, as complementary p-TFET, an indium(gallium)arsenide-source silicon-channel TFET reach on-currents comparable to MOSFETs. TFETs offer new opportunities, like the short-gate configuration, due to their different operating principle. At the same time, the latter implies that models need to be newly developed. The agreement of models with experimental data is still qualitative only.