Abstract
This paper presents the analysis of through silicon via (TSV) with embedded capacitor for impedance tuning to improve the power integrity (PI) performance of Application-Specific Integrated Circuit – High Bandwidth Memory (ASIC-HBM) system. The crosstalk due to TSV with embedded capacitor (TSV-Cap) to signal integrity (SI) performance is evaluated by analyzing its frequency response up to 100 GHz and its eye diagram. Using this TSV-CAP, the power distribution network (PDN) impedance is kept below 50 mΩ up to 5 GHz while achieving data rate of 5 Gbps.
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