Abstract
Random numbers are widely employed in cryptography and security applications. If the generation process is weak, the whole chain of security can be compromised: these weaknesses could be exploited by an attacker to retrieve the information, breaking even the most robust implementation of a cipher. Due to their intrinsic close relationship with analogue parameters of the circuit, True Random Number Generators are usually tailored on specific silicon technology and are not easily scalable on programmable hardware, without affecting their entropy. On the other hand, programmable hardware and programmable System on Chip are gaining large adoption rate, also in security critical application, where high quality random number generation is mandatory. The work presented herein describes the design and the validation of a digital True Random Number Generator for cryptographically secure applications on Field Programmable Gate Array. After a preliminary study of literature and standards specifying requirements for random number generation, the design flow is illustrated, from specifications definition to the synthesis phase. Several solutions have been studied to assess their performances on a Field Programmable Gate Array device, with the aim to select the highest performance architecture. The proposed designs have been tested and validated, employing official test suites released by NIST standardization body, assessing the independence from the place and route and the randomness degree of the generated output. An architecture derived from the Fibonacci-Galois Ring Oscillator has been selected and synthesized on Intel Stratix IV, supporting throughput up to 400 Mbps. The achieved entropy in the best configuration is greater than 0.995.
Highlights
Random Number Generation for SecurityWith the increasing number of connected-devices the information security is becoming more important than ever before [1]
This work presented an analysis of existing TRNGs and a methodology to assess which one can be claimed to be the best option in terms of entropy and robustness to placing mismatch
The testing phase focused on the entropy source, evaluating different state-of-the-art TRNG circuits in Field Programmable Gate Arrays (FPGAs) technology and testing their output quality
Summary
Random Number Generation for SecurityWith the increasing number of connected-devices the information security is becoming more important than ever before [1]. A large number of security operations, in less conventional fields such as smart grids [2], require random numbers to protect the confidentiality, integrity and authenticity of the exchanged information. Nonces generation in authentication protocols and digital signatures require, unpredictable numbers [3]. Random numbers are fundamental for the security of digital signature algorithms [5] and can be employed for the improvement of passwords security in user authentication contexts (e.g., One Time Passwords). A TrueRandom Bit (or Number) Generator (TRBG or TRNG) exploits physical phenomenons to acquire random data (with high entropy) from unpredictable sources, such as thermal noise and jitter. Depending on the nature of the entropy source, the randomness can be generated either in the analogue world (e.g., noise or sensors [6]) or in the digital world (e.g., Jitter)
Sign-in/Register to view highlights & summary Sign-in/Register to access full text options 
Free) 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a call
