Abstract

The true-differential superconductor on-chip amplifier has complementary outputs that float with respect to chip ground. This improves signal integrity and compatibility with the receiving semiconductor stage. Both source-terminated and non-source-terminated designs producing 4 mV demonstrated rejection of a large common mode interference in the package. Measured margins are ±8.5% on the output bias, and ±28% on AC clock amplitude. Waveforms and eye diagrams are taken at 2.9–10 Gb . Direct measurement of bit-error rates are better than the resolution limit of at 2.9 Gb , and better than at 10 Gb .

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call