Triple Sensing Current Margin for Maintainable MRAM Yield at Sub-100% Tunnel Magnetoresistance Ratio

Abstract

Spin transfer torque magnetic random access memory (STT-MRAM) creates significant breakthroughs as a proper candidate of next-generation non-volatile memory (NVM). Although STT-MRAM achieves high endurance, low access latency, and power consumption, the yield issue remains one of the critical concerns in high-density and large-scale MRAM array design. In this article, a novel triple-current margin sensing amplifier (TM-SA) is proposed for maintainable MRAM yield based on the current-mode SA and transmission gate switches. The sensing current margin of the proposed TM-SA is three times enlarged compared to traditional current mean (CM)-SA and resistance mean (RM)-SA. With a seriously degraded tunnel magnetoresistance (TMR) ratio (sub-100%, as low as 10%), the maximum voltage margin is 4.6 times of conventional CM-SA and five times of RM-SA. Monte-Carlo simulation shows that sensing failure probability can be greatly alleviated with the proposed TM-SA. The performance of TM-SA with respect to voltage margin can be further improved than that of CM-SA and RM-SA.