Abstract
The constant drive to further miniaturization and heterogeneous system integration leads to a need for new packaging technologies that also allow large area processing and 3D integration with strong potential for low cost applications. Here, Fan-Out Wafer Level Packaging [FOWLP] is one of the latest packaging trends in microelectronics. Besides developments to higher and heterogeneous integration the movement to larger formats and panel level packaging to lower cost is noticeable.
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