Abstract

In this paper, a new low-voltage planar gate superjunction (SJ) lateral double-diffused MOSFET (LDMOSFET) is presented. The proposed trench-gate-integrated SJ-LDMOSFET is composed of a conventional planar gate structure and a trench gate structure extending into a drift region through a channel region, which helps reduce both drift resistance and channel resistance. By device simulation, we confirmed that current crowding near the top surface was alleviated by the spread of electron current into the drift region through the accumulation layer of the trench gate. As a result, the specific on-resistance (RON · A) of the trench-gate-integrated SJ-LDMOSFET can be reduced by increasing SJ thickness (TSJ), and the trench-gate-integrated SJ-LDMOSFET with a TSJ of 4 µm achieved an RON · A of 0.47 mΩ·cm2 at a breakdown voltage of 97 V. This is about 14% lower than the one-dimensional Si limit.

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