Trapping, emission and generation in MNOS memory devices

Abstract

This study is concerned with trapping phenomena occuring at the semiconductor-oxide interface and in the nitride layer of variable-threshold metal-nitride-oxide-semiconductor (MNOS) memory devices. The technique consits of biasing the device in such a manner as to charge or discharge either the interface traps or the nitride traps, or both sets of traps simultaneously. The device is then cooled to low temperature with the bias still applied, and at the low temperature the biasing condition is changed, in order to induce the device into a non-steady mode that is quasi-stable at the low temperature. The temperature of the device is then raised at a constant rate, and the resulting current vs temperature ( I- T) characteristics is found to be rich in structure. By means of a series of systematic experiments the various portions of the I- T characteristic are identified with emission of electrons from interface states and the nitride traps, and surface generation. From this data the energy distribution of interface states is determied. It is shown that the memory charge in the nitride is distributed throughout the nitride, and temporary memory charge and semi-permanent memory charge are distinguished.