Trap-assisted degradation mechanisms in E-mode p-GaN power HEMT: A review

Abstract

Transistor-based on Gallium Nitride (GaN) technology, has enabled energy-saving power electronics to alleviate global energy utilization. Being the initial stages of the development as compared to mature Silicon (Si) technology, the critical issues related to the reliability of GaN-based devices are not much explored. To better understand the device reliability, the article reviews and summarizes, the trapping induced threshold voltage (VTH) instability and dynamic ON-resistance (RDS,ON) degradation specifically, for normally-off p-GaN gate HEMTs in power applications. The variation in threshold voltage and dynamic ON-resistance is examined for different operating regimes, which include biasing voltage and temperature. Furthermore, the characterization methods and test setups are discussed in detail to extract the true value of RDS,ON observed in the GaN power converter. Various models and techniques are reviewed as well which improves the converter conduction losses, introduced by dynamic ON-resistance. Additionally, different techniques are discussed in the review to control the VTH instability. It is observed that the point and extended defects created during device fabrication or charge trapping in GaN buffer, AlGaN layer, surface, or at their interface, induce variation in (VTH) and RDS,ON, for both the gate and drain stress regimes. Threshold voltage stability is mainly affected by the traps below the gate region, while the traps across the gate to drain access region influence the RDS,ON. The variation in RDS,ON value, is seen to be dependent on stress time, different device technology, and, switching conditions (frequency and duty cycle). In power application, the dynamic resistance shows a more pronounced effect on converter efficiency as compared to the VTH.