Abstract

Abstract: There is an immense necessity for several kB of embedded memory for Biomedical systems which typically operate in the sub-threshold domain with perfect efficiency. SRAMS dominates the total power consumption and the overall silicon area, as 70% of the die has been occupied by them. This brief proposes the design of a Transmission gate-based SRAM cell for Biomedical applications eliminating the use of peripheral circuitry during the read operation. This topology offers a smaller area, reduced delay, low power consumption, and improved data stability in the read operation. Static Random Access Memories mostly contribute to the performance, area, and power dissipation of digitally integrated systems. The mentioned implantable and wireless applications require low-power circuits operating for a long time, occupying less area without degrading the performance, as it provides inconvenience and may even be risky especially while considering the implantable devices.

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