Towards the Rational Design of Printed 2D Materials

Abstract

Abstract Body: The formulation of inks based on 2D materials could enhance the performance of and provide new functional behaviors to printed electronics while retaining scalable manufacturing processes. Recent advances in solution-based exfoliation have demonstrated that the electronic properties of single semiconducting 2D nanosheets can be preserved during ink processing, but there remain several challenges to the production of thin-film transistors based on printed 2D materials. In addition to minimizing inter-sheet resistivity and preserving bulk-like mobilities, the local electronic properties and microstructure of the composite material must be optimized to minimize the resistance of overlapping nanosheets (i.e. junction resistance). To rationally guide the development of 2D inks and related processing, we explored the design principles by integrating device modeling with electrical and scanning probe characterization on transistors consisting of partially overlapping 2D channels (Figure 1a). We examined the limiting factors to the junction resistance by benchmarking a gate-dependent resistor network model with experimentally measured electrical characteristics for model MoS2/MoS2 homojunctions and utilized the model to quantify performance trade-offs determined by nanosheet thickness, percent overlap, sheet resistance and inter-sheet resistivity. Kelvin probe force microscopy (KPFM) was used to measure the surface potential profiles in transistor channels as a function of applied bias conditions and morphological characteristics such as nanosheet thickness. Detailed analysis of the abrupt potential drop measured at the conformal edge provides evidence that the on-state transistor performance of overlapping nanosheets is limited by the local sheet resistance (Figure 1b), which is likely due to weakly screened trapped charges at the edge state. This suggests that passivation and/or functionalization schemes targeting the edges of nanosheets could greatly improve transistor performance. Moreover, we found that screening of the upper portions of overlapping nanosheets produces current crowding at junctions between the edge of one nanosheet and the basal plane of another. Reducing the nanosheet thickness (i.e. the number of layers) increases the carrier concentration of the top nanosheet, thus distributing the current over longer distance and facilitating efficient inter-sheet charge transfer (Figure 2a), which increases the effective mobility and optimum percent overlap (Figure 2b). This provides further motivation to develop exfoliation schemes that preserve intrinsic monolayer properties.