Toward Hole-Spin Qubits in Si p -MOSFETs within a Planar CMOS Foundry Technology

Abstract

Hole spins in semiconductor quantum dots represent a viable route for the implementation of electrically controlled qubits. In particular, the qubit implementation based on $\mathrm{Si}$ $p$-MOSFETs offers great potentialities in terms of integration with the control electronics and long-term scalability. Moreover, the future down scaling of these devices will possibly improve the performance of both the classical (control) and quantum components of such monolithically integrated circuits. Here, we use a multiscale approach to simulate a hole-spin qubit in a down-scaled $\mathrm{Si}$-channel $p$-MOSFET, the structure of which is based on a commercial 22-nm fully depleted silicon-on-insulator device. Our calculations show the formation of well-defined hole quantum dots within the $\mathrm{Si}$ channel and the possibility of a general electrical control, with Rabi frequencies of the order of $100\phantom{\rule{0.2em}{0ex}}\mathrm{MHz}$ for realistic field values. A crucial role of the channel aspect ratio is also demonstrated, as well as the presence of a favorable parameter range for the qubit manipulation.