Abstract
MOSFETs fabricated in the commercial American Microsystems Inc. (AMI) 0.35-/spl mu/m CMOS process were characterized with respect to the effects of total dose irradiation. Gate oxide threshold voltage shifts up to 300 krad(Si) for both NMOS and PMOS transistors biased for worst-case shifts were less than 25 mV. Off-state field leakage currents for isolated NMOS transistors was above 1 nA at 30 krad(Si). The effect of a post-irradiation high temperature anneal was to lower these leakage currents to their preirradiation levels. PMOS transistors exhibited less than 10 pA leakage for doses up to 300 krad(Si). Measurements on edgeless annular NMOS transistors showed only minor increases in leakage current with total dose up to 300 krad(Si), indicating that the increased leakage observed in standard NMOS transistors is the result of field leakage associated with inversion in the bird's beak region at the transistor/field oxide interface. Measurements of the threshold voltage, transconductance and subthreshold swing for the edgeless transistors indicated no significant changes up to 300 krad(Si), indicative of a lack of trapped holes and lack of interface state formation in the gate oxide. Measurements on ring-oscillators biased dynamically during irradiation showed less than a 5% change in gate delay and in power up to 300 krad(Si) total dose, suggesting that for actual digital circuits applications, functionality and performance may be maintained to doses substantially above 30 krad(Si).
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