Total-ionization-dose characterization of a radiation-hardened mixed-signal microcontroller SoC in 180 nm CMOS technology for nanosatellites

Abstract

This paper presents design techniques and measurement results of a radiation-hardened mixed-signal microcontroller system-on-chip (SoC) dedicated to fully-customized nanosatellites for the civil active space debris (ADR) cleaning missions. The design requirements are firstly given. The architecture of an on-board computer (OBC) is then described. A radiation-hardened-by-design (RHBD) SoC is proposed for such applications to obtain a long operational period. The proposed SoC is composed of a dual-modular redundant (DMR) 16-bit RISC processor, a 1 kB SRAM, a 12-bit pipelined SAR ADC, a 12-bit current-steering DAC and an on-chip clock generator. The radiation-hardened-by-design techniques are adopted to resist the total-ionization-dose (TID) effects. An SoC prototype is designed and fabricated in 180 nm CMOS process. The electronical performance of devices-under-test (DUTs) has been measured based on a customized mother-daughter board. The performance of the proposed SoC meet the requirements of the nanosatellites. Furthermore, the TID radiation effect experiment is performed. It indicated that the proposed SoC can resist the total dose of more than 300 krad (Si) at the dose rate of 50 rad (Si)/s.