Abstract
This paper investigates the impact of total ionizing dose (TID) effects on the performance of CMOS voltage reference circuits. Four circuits were designed using a commercial 130-nm CMOS process and without any radiation-hardening technique. Two of the designed circuits generate the output voltage proportional to the bandgap voltage, while the other two generate the output voltage proportional to the MOS threshold voltage. The measured output voltage variation caused by TID was from 1% to 15% for a total dose of up to 500 krad, depending on the circuit topology. The leakage currents induced by radiation in MOS transistors and diodes were the main cause of output voltage variation.
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