Abstract

Superpages have long been proposed to enlarge the coverage of translation lookaside buffer (TLB). They are extremely beneficial for reducing address translation overhead in big memory systems, such as hybrid memory systems that composed of DRAM and non-volatile memories (NVMs). However, superpages conflict with fine-grained memory migration, one of the key techniques in hybrid memory systems to improve performance and energy efficiency. Fine-grained page migrations usually require to splinter superpages, mitigating the benefit of TLB hardware for superpages. In this paper, we present Tamp, an efficient memory management mechanism to support multiple page sizes in hybrid memory systems. We manage large-capacity NVM using superpages, and use a relatively small size of DRAM to cache hot base pages within the superpages. We find that there are remarkable contiguity exist for hot base pages in superpages. In response, we bind those contiguous hot pages together and migrate them to DRAM. We also propose multi-grained TLBs to coalesce multiple page address translations into a single TLB entry. Our experimental results show that Tamp can significantly reduce TLB misses by 62.4% on average, and improve application performance (IPC) by 16.2%, compared to a page migration policy without TLB coalescing support.

Highlights

  • Emerging byte-addressable non-volatile memory (NVM) technologies promise higher density and lower cost per bit than Dynamic Random Access Memory (DRAM)

  • To build a large-scale, high-performance, and energy-efficient memory system, a vast number of studies have focused on designing a heterogeneous memory system that composed of DRAM and NVM

  • What’s more, to overcome the disadvantages brought by NVMs, page migration schemes are wildly used in those hybrid memory systems

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Summary

Introduction

Emerging byte-addressable non-volatile memory (NVM) technologies promise higher density and lower cost per bit than Dynamic Random Access Memory (DRAM). They are able to significantly increase the capacity of main memory combining with DRAM [1]–[4]. Current DRAM technologies can not meet the requirement of big memory systems [17]–[19] Both industry and academia have increasing interests in emerging Non-Volatile Memory (NVM) technologies (for example, PCM/3D XPoint [20], STT-MRAM [21] and ReRAM [22]), for their high memory density, much cheap (low cost per bit), and low standby power consumption. What’s more, to overcome the disadvantages brought by NVMs, page migration schemes are wildly used in those hybrid memory systems

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