Abstract
In recent years, frameworks such as RapidSmith and Tore have been developed for the creation of custom CAD tools able to target actual Xilinx FPGA devices. These have been based on the Xilinx Design Language (XDL), which provides textual representations of both mapped user designs as well as detailed physical FPGA device descriptions. Vivado, Xilinx's new design suite, discontinues XDL and instead provides direct access to its data structures through a Tel interface and through EDIF and constraint files. This paper formally introduces Tincr, a library of high-level Tel routines that support the creation of custom circuit manipulation tools. A case study on the use of Tincr for the creation of a simple placement tool is given. Additionally, this paper describes Tincr's facilities for importing and exporting XDL- and XDLRC-like information to and from Vivado to allow the continued use of existing external CAD tool frameworks such as RapidSmith and Tore with Vivado.
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