Timing Mismatch Compensation in Time-Interleaved ADCs Based on Multichannel Lagrange Polynomial Interpolation

Abstract

In this paper, the timing mismatch compensation problem in the implementation of a time-interleaved analog-to-digital converter (TIADC) is investigated. The investigation leads to a novel multichannel Lagrange polynomial interpolation timing-mismatch compensation algorithm (MLPI-TMCA). A multichannel Lagrange compensation filter (MLCF) in the form of a finite-impulse response (FIR) filter is also developed for real-time implementation. The design of the compensation system is done in three steps. First, the coefficients of the MLCF are computed based on the mismatch parameters of the TIADC. Second, an Nth order FIR filtering process is performed for each sub-ADC. Third, a multiplexer is used to combine the output of each compensation filter in an orderly manner into the final compensated output signal. The computational complexity of this timing mismatch compensation system is of order N. Computer simulation results showed that MLPI-TMCA is computationally efficient and not sensitive to timing mismatch fluctuations. The actual implementation of a four-channel 320-MHz 12-bit TIADC showed that the MLPI-TMCA is able to efficiently compensate the timing mismatch in a real-time manner and produced about 30-dB spurious-free dynamic range (SFDR) enhancement when the input signal frequency is 70 MHz, whereas the multirate filter banks compensation method produced about 19 dB of SFDR enhancement under the same condition. Thus, the MLPI-TMCA and its multichannel filter implementation provides a good solution for TIADC real-time timing mismatch compensation and may be employed in TIADC chip design due to its implementation advantages.