Abstract

We report on the design of a self-triggered analog front-end readout electronics dedicated for signal detection from double-sided silicon microstrip sensors with capacitance at the order of tens pF (C <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">DET</sub> ≈ 30 pF). The main requirements are: processing input pulses with the average rate of 150 kHz/channel, low power consumption and low noise at the same time. The single channel is built of two different parallel processing chains: the fast and slow. The fast path includes: a fast CR-RC shaper with the peaking time t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> = 40 ns, a discriminator, a pulse stretcher and a time stamp latch. It is optimized to determine an input charge arrival time with resolution at the order of few ns. The slow path consists of: a slow shaper with the peaking time t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</sub> = 80 ns, a 5-bit flash ADC and a digital peak detector. This chain is dedicated for accurate energy measurement and it is optimized for low noise level. To protect against false noise-related hits coming from noisy fast processing path when the discrimination threshold is set low, the time-stamp validation circuit is used. Two prototype ASICs were implemented in UMC 180 nm CMOS technology: 8-channel AFE-XYTER and 128-channel STS-XYTER.

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