Abstract

We report on the design and measurements of an analog front-end readout electronics dedicated for silicon microstrip detectors with relatively large capacitance of the order of tens pF for time and energy measurements of incoming pulses. The front-end readout electronics is required to process input pulses with an average rate of 150kHz/channel with low both power consumption and noise at the same time. In the presented solution the single channel is built of two different parallel processing paths: fast and slow. The fast path includes the fast CR–RC shaper with the peaking time tp=40ns and is optimized to determine the input charge arrival time. The slow path, which consists of the slow CR–(RC)2 shaper with the peaking time tp=80ns, is dedicated for low noise accurate energy measurement. The analog front-end electronics was implemented in UMC 180nm CMOS technology as a prototype ASIC AFE. The AFE chip contains 8 channels with the size of 58μm×1150μm each. It has low power dissipation Pdiss=3.1mW per single channel. The article presents the details of the front-end architecture and the measurement results.

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