TID-Induced Degradation in Static and Noise Behavior of Sub-100 nm Multifinger Bulk NMOSFETs

Abstract

This paper is concerned with the study of the total ionizing dose (TID) effects in NMOS transistors belonging to 90 and 65 nm CMOS technologies from different manufacturers. Results from static and noise measurements are used to collect further evidence for a static and noise degradation model involving charge buildup in shallow trench isolations and lateral parasitic transistor activation. Comparison between two CMOS processes both belonging to the 90 nm node but coming from different foundries makes it possible to shed some light on the process-dependent features of the device response to ionizing radiation.