TID Effects in Highly Scaled Gate-All-Around Si Nanowire CMOS Transistors Irradiated to Ultrahigh Doses

Abstract

Total-ionizing-dose (TID) effects are investigated in a highly-scaled gate-all-around (GAA) FET technology using Si nanowire channels with a diameter of 8 nm. n- and p-FETs are irradiated up to 300 Mrad(SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) and annealed at room temperature. TID effects are negligible up to 10 Mrad(SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ). At ultrahigh doses, the TID degradation depends on the irradiation bias condition, with more severe effects observed in longer channel devices. The worst case irradiation condition is when positive bias is applied to the gate. Threshold-voltage shifts are caused by H <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> -driven generation of interface traps at the oxide/channel interface. In contrast, FETs irradiated under negative gate bias are dominated by transconductance loss and increases of low-frequency noise, suggesting the activation of border traps. Enhanced off-leakage current is observed in n-FETs due to charge trapping in shallow-trench isolation, and in p-FETs due to trap-assisted recombination at STI sidewalls and/or spacer dielectrics at drain/bulk junctions.