Threshold-Voltage Modeling of Bulk Fin Field Transistors by Considering Surface Potential Lowering

Abstract

Threshold voltage (Vth) modeling of the double/triple-gate bulk fin field-effect transistors (FinFETs) was performed by considering the potential lowering at the surface of fin body at VGS=Vth condition. With decreasing gate length and/or fin width, the surface band-bending (2ψB) at VGS=Vth in fully depleted bulk FinFETs decreases since actual surface potential decreases at the Vth condition. Based on the 2ψB correction, charge-sharing length (xh) and corner factor (αc) were newly extracted. The Vth behaviors of bulk FinFETs were modeled based on the surface potential lowering, three-dimensional (3-D) charge-sharing, narrow-width effect, and corner factor. The Vth model predicted well the Vth behavior with fin body width, body doping concentration, gate length, gate height, and corner shape of the fin body. Our compact models predicted accurately Vth of the devices with the gate length up to 20 nm and the fin body width up to 5 nm.