Abstract
In digital receiver designs, An Automatic Gain Control (AGC) block is used to scale the power of input signal so as to meet high dynamic range requirement. This paper proposed a new method called Threshold Variation (TV) analysis that best suits framed based Pulsed Doppler (PD) radar Step AGC design. The minimal dB control step, system threshold and the stability of Envelop Detector Filter (EDF) could be attained from TV analysis. By utilizing a Cascaded Integrator Comb (CIC) Filter and the α|Max|+β|Min| magnitude approximation, an optimized AGC circuitry is implemented in FPGA. Our practice has proved that the circuitry has appealing performance in a digital Receiver.
Published Version
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