Three-Dimensional Modelling to Study the Effect of Die-Stacking Shape on Mould Filling During Encapsulation of Microelectronic Chips

Abstract

Multistacked-chip scale package (S-CSP) is a new technology that provides high density electronic package. A fully 3-D numerical model is developed to simulate mould filling behavior in the epoxy moulding compound (EMC) encapsulation of multi-S-CSP. Four different shapes of chip arrangement namely uniform, rotated, z-staggered-Type A and z-staggered-Type B, have been tested. The EMC is treated as a generalized Newtonian fluid (GNF). The developed methodology combines the Kawamura and Kuwahara technique-based finite difference method (FDM) and the robustness of volume-tracking (VOF) method to solve the two-phase flow field around the complex arrangement of microchips in a cavity. The Castro-Macosko rheology model with Arrhenius temperature dependence is adopted in the viscosity model. Short-shot experiments are conducted to investigate the filling patterns at several time intervals. The results show that the rotated shape die-arrangement gives minimum filling time and better mould filling yield. The close agreement between the experimental and simulation results illustrates the applicability of the proposed numerical model.