Abstract

As the MEMS (Micro-Electro-Mechanical Systems) devices head towards smaller form factor and greater functionalities, improvement in WLCSP (Wafer Level Chip Scale Package) technology is necessary to meet the new requirements from today's electronic devices. TSV (Through Silicon Via) technology has always been used as the vertical interconnections for assembly of MEMS-WLCSP packaging. In our development work, we proposed to use an innovative approach to substitute the TSV with TMV (Through Mold Via), using the wafer-level over-molding of vertical Si (silicon) pillars and Cu (copper) wires as vertical interconnections. For the molding process development work, epoxy mold compound (EMC) and silicone mold compound (SMC) materials were studied to explore suitable mold material candidates for good wafer warpage control and void free vertical interconnects structure mold filling. Fine filler (EMC) B and (EMC) C molded to a thin over-mold cap of 150μm gave void free mold fill and the best wafer warpage control for subsequent Cu (cooper) redistributed layers (RDL)s processing. Liquid (EMC) B was observed to be more suitable for encapsulating vertical wires than granular (EMC) C as random wires collapse was observed after the molding process. Greater Cu smearing on the exposed Cu wire interconnections was observed on (EMC) C as compared to (EMC) B after the mold cap was back-grinded to expose the vertical interconnects. Greater Cu smearing could be attributed to the lower modulus for (EMC) C, which resulted in greater galling after back-grinding and greater Cu smearing. In conclusion, the (SMC) candidates have good wafer warpage control, but were not suitable for our MEMS-WLCSP process flow due to void presence in (SMC) D and flattening of wires for (SMC) E. Hence, (EMC) B and (EMC) C were shortlisted for actual wafers molding development.

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