Abstract
A wafer-level three-dimensional (3D) integration scheme for forming via-last through-silicon vias (TSVs) was developed. This scheme includes wafer-to-wafer (W2W) stacking technology with a copper/polymer hybrid bonding and a via-last TSV process compatible with a copper/low-k interconnect structure. Bonding of a copper/polymer hybrid wafer with a ventilation channel structure provides good copper-to-copper bonding as well as good polymer-to-polymer bonding without producing any large bonding voids. Via-last TSVs (8 μm in diameter and 25 μm in length) were successfully formed in the bonded wafer, indicating the effectiveness of the proposed 3D integration scheme.
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