Three-input gate logic circuits on chemically assembled single-electron transistors with organic and inorganic hybrid passivation layers

Yutaka Majima,Guillaume Hackenberger,Yasuo Azuma,Shinya Kano,Kosuke Matsuzaki,Tomofumi Susaki,Masanori Sakamoto,Toshiharu Teranishi

doi:10.1080/14686996.2017.1320190

Abstract

Single-electron transistors (SETs) are sub-10-nm scale electronic devices based on conductive Coulomb islands sandwiched between double-barrier tunneling barriers. Chemically assembled SETs with alkanethiol-protected Au nanoparticles show highly stable Coulomb diamonds and two-input logic operations. The combination of bottom-up and top-down processes used to form the passivation layer is vital for realizing multi-gate chemically assembled SET circuits, as this combination enables us to connect conventional complementary metal oxide semiconductor (CMOS) technologies via planar processes. Here, three-input gate exclusive-OR (XOR) logic operations are demonstrated in passivated chemically assembled SETs. The passivation layer is a hybrid bilayer of self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlO), and top-gate electrodes were prepared on the hybrid passivation layers. Top and two-side-gated SETs showed clear Coulomb oscillation and diamonds for each of the three available gates, and three-input gate XOR logic operation was clearly demonstrated. These results show the potential of chemically assembled SETs to work as logic devices with multi-gate inputs using organic and inorganic hybrid passivation layers.

Highlights

Novel sub-10-nm scale transistors are required for the realization of next-generation electronics, since a widely accepted design rule for semiconductor devices is that they must shrink over time, down to 5 nm within the 10 years based on current projections [1]
We report three-input gate logic operations on a single chemically assembled Single-electron transistors (SETs) with hybrid passivated bilayers based on mixed self-assembled monolayers (SAMs) and pulsed laser deposited (PLD) aluminum oxide (AlOx)
Two theoretical curves coincide well with the experimental Coulomb staircases, indicating that the hybrid SAM and AlOx passivated SET still functioned after the PLD and electron-beam lithography (EBL) processes for the passivation and top-gate electrode, respectively, during which the sample was pre-baked at 423 K for 10 min within the EBL process

Summary

Introduction

Novel sub-10-nm scale transistors are required for the realization of next-generation electronics, since a widely accepted design rule for semiconductor devices is that they must shrink over time, down to 5 nm within the 10 years based on current projections [1]. Even with Coulomb islands of colloidal Au nanoparticles covered by organic alkanethiol molecules, the hybrid passivated SETs showed clear and stable Coulomb diamonds with applied top-gate voltage [36]. We report three-input gate logic operations on a single chemically assembled SET with hybrid passivated bilayers based on mixed SAMs and pulsed laser deposited (PLD) aluminum oxide (AlOx). XOR logic operations with the three-input gates are demonstrated by applying simultaneous pulse gate voltages These results extend the possibility of combining top-down and bottom-up adoption technologies for the fabrication of chemically assembled SET logic circuits, in which organic alkanethiols and inorganic materials are used as hybrid insulators

Experimental details

Top-gate

Results and discussion

Conclusions