Thermomechanical Reliability Investigation of Carbon Nanotube Off-Chip Interconnects for Electronic Packages

Abstract

This article investigates the mechanical reliability benefits of carbon nanotube (CNT) off-chip interconnects for future electronic packages. Finite-element analysis (FEA) of a silicon chip attached to an organic substrate showed that CNT off-chip interconnects with an isotropic modulus of 1 MPa reduced the principal stresses in the silicon chip ~71%–93% compared with lead-free solder balls without underfill. In addition to reducing chip stresses, chip warpage was essentially eliminated by utilizing CNT interconnects compared with solder balls. Parameters of importance for the implementation of CNTs as interconnects such as CNT modulus and height were investigated with finite-element analysis. It was found that chip stresses increase with increasing CNT modulus, but for the modulus range reported in the literature and examined here (0.1–500 MPa), chip stresses were much less than packages utilizing solder balls. Due to the structure and morphology of CNT forests, the different material model types of fully isotropic versus transversely isotropic that can be used to model CNT interconnects were investigated. While the models yielded similar mechanical behavior in the finite-element analyses, the isotropic CNT model was mechanically conservative and simpler to implement and, therefore, sufficient for future thermomechanical reliability studies. To further demonstrate the thermomechanical reliability benefits, silicon chips with CNT off-chip interconnects were fabricated and assembled to organic substrates and subjected to cyclic thermal shock testing. During testing, the daisy chain circuit containing CNT interconnects survived 1660 cycles, demonstrating that CNT interconnects mechanically decouple the chip from the substrate and, therefore, reduce chip stresses caused by coefficient of thermal expansion (CTE) mismatch.