Abstract
We demonstrate techniques for measuring thermoelectric voltages and generating on-chip power using a silicon-on-insulator substrate. Our design uses lateral heat conduction in the silicon overlayer to establish temperature gradients, which dramatically reduces microfabrication complexity compared to competing designs based on a free-standing membrane. This letter characterizes the thermoelectric power of a metal–semiconductor structure involving a doped SbTe alloy that is relevant for phase-change memory. The thermoelectric power of the SbTe–TiW thermocouple is 24 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu\hbox{V/K}$</tex></formula> , and the power generation output achieves up to 0.56 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\mu\hbox{W/cm}^{2}$</tex></formula> with a temperature gradient of 18 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$^{\circ}\hbox{K}$</tex></formula> . <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\hfill$</tex></formula> [2011-0233]
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