Abstract

Two thermal models of different level, a component model and an interconnection model, were established to simulate the solidification of lead-free solder interconnections of a chip-scale packaged component during reflow soldering. The thermal properties of the interconnections were derived with the help of thermodynamic calculations relevant to the phase transformations occurring during melting and solidification. Experimental measurements were carried out and the data were used to determine some parameters so that the model is more realistic. Although the results of the component model agreed with the experimental measurements in the faster cooling of the component than the board, the interconnection model suggested that the temperature gradients over the interconnections were unlikely to be of significance until the invariant eutectic reaction commenced. The findings imply that solder/metallization interfaces on printed wiring board and component sides are equally likely sites for initiating the solidification of interconnections. On the basis of the simulated temperature distribution, the growth conditions of the primary Sn are evaluated and an explanation for the sequence of solidification steps has also been given

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call