Thermal Performance of 3D IC Integration with Through-Silicon Via (TSV)

Abstract

Thermal performance of 3D IC integration is investigated in this study. Emphasis is placed on the determination of a set of equivalent thermal conductivity equations for Cu-filled TSVs with various TSV diameters, TSV pitches, TSV thicknesses, passivation thicknesses, and microbump pads. Also, the thermal behavior of a TSV cell is examined. Furthermore, 3D heat transfer simulations are adopted to verify the accuracy of the equivalent equations. Finally, the feasibility of these equivalent equations is demonstrated through a simple 3D IC integration structure.