Thermal analysis of a substrate with power dissipation in the vias

Abstract

As power dissipation at the chip level increases, current levels through power distribution wires increase correspondingly. This current flow results in Joule heating in the package, which must be included in any sizing of the package cooling requirements. An analysis of the temperature field resulting from the Joule heating in a metal wire surrounded by a nonheat generating (electrically insulating) material is presented. Exact analytical solutions are given for when the heat generation rate is constant (independent of temperature) and linearly dependent on the temperature. Asymptotic solutions are given for arbitrarily temperature-dependent heat generation, when the insulating material thermal conductivity is much less than the thermal conductivity of the wire. A numerical example of practical interest is then considered. It is shown that neglecting the Joule heating in the wires can result in significant under-prediction of the temperature. The effect of temperature on the electrical resistivity of the wire is shown to be negligible. The phenomenon of thermal runaway is also examined using stability theory and is shown to be unimportant in practical circumstances.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>