Theoretical Investigation of Performance Enhancement in GeSn/SiGeSn Type-II Staggered Heterojunction Tunneling FET

Abstract

We design a GeSn/SiGeSn type-II staggered heterojunction n-channel tunneling FET (hetero-NTFET). The energy band structures of GeSn and SiGeSn alloys were calculated by utilizing the nonlocal empirical pseudopotential method. Staggered band alignment at $\Gamma $ -point for lattice-matched GeSn/SiGeSn is achieved by tuning the material compositions. The impact of a type-II tunneling junction (TJ) on the electrical performance of hetero-NTFET is investigated through a simulation using a TCAD simulator. Hetero-NTFET exhibits a negative shift of onset voltage $V_{\mathrm {ONSET}}$ , a steeper subthreshold swing, a higher on-state current $I_{\mathrm{\scriptscriptstyle ON}}$ , and a larger on-state current to off-state current ratio $ I_{\mathrm{\scriptscriptstyle ON}}/I_{\mathrm{\scriptscriptstyle OFF}}$ as compared with GeSn homojunction n-channel tunneling FET. A 3.4 times higher $I_{\mathrm{\scriptscriptstyle ON}}$ is achieved in Ge0.90Sn0.10/Si0.40Ge0.40Sn0.20 hetero-NTFET in comparison with Ge0.90Sn0.10 homo device at $V_{\mathrm {DD}}$ of 0.3 V. A hetero-NTFET exhibits a more abrupt hole profile and a higher hole concentration in a source region near the TJ compared with the homo device due to the presence of the hetero TJ. This contributes to the significantly enhanced band-to-band tunneling rate and tunneling current in the hetero-NTFET.